• DocumentCode
    1283477
  • Title

    Multiple fault detection using single-fault tests

  • Author

    Kuo, T.-Y. ; Wang, Jhing-Fa ; Lee, Joon-Yeong

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
  • Volume
    27
  • Issue
    15
  • fYear
    1991
  • fDate
    7/18/1991 12:00:00 AM
  • Firstpage
    1329
  • Lastpage
    1330
  • Abstract
    A special class of two-pattern tests for single faults is defined using the Boolean difference approach to enhance the multiple fault detection ability for combinational circuits. It is shown that just a slight modification of the concurrent test generation method proposed by Agrawal et al. (1989) can derive such two-pattern tests.
  • Keywords
    Boolean algebra; VLSI; combinatorial circuits; integrated circuit testing; integrated logic circuits; logic testing; Boolean difference approach; combinational circuits; concurrent test generation method; multiple fault detection; single-fault tests; two-pattern tests;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19910836
  • Filename
    81221
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1283477