Title :
Rotary Coding for Power Reduction and S/N Improvement in Inductive-Coupling Data Communication
Author :
Radecki, Andrzej ; Miura, Noriyuki ; Ishikuro, Hiroki ; Kuroda, Tadahiro
Author_Institution :
Dept. of Electron. & Electr. Eng., Keio Univ., Yokohama, Japan
Abstract :
In this paper, we describe a noncontact inductive-coupling data transmission link employing rotary data encoding. A system using this data-transmission link is inherently insensitive to jitter introduced in the channel and consumes approximately 50% less power than previously reported solutions. The system is targeted for applications benefiting from simultaneous noncontact power and data transmission, such as wafer-level testing, memory card interfaces, and inter-strata data communication in 3-D integrated circuits. Functionality of the proposed link is verified experimentally with a test chip developed in an 0.18-μm CMOS process. In the second part of this paper, we introduce a design of a high-speed data transceiver using rotary coding. We demonstrate that, because of properties of the rotary coding, a simple transceiver without a PLL-based CDR circuit can operate at data rates limited only by characteristics of the physical channel. For performance optimization, we have developed a new family of ternary logic gates including latches, D-flip-flops, and multiplexers.
Keywords :
CMOS integrated circuits; couplings; data communication; digital circuits; encoding; jitter; logic gates; transceivers; 3D integrated circuits; CMOS process; D-flip-flops; S-N improvement; inductive-coupling data communication; interstrata data communication; jitter; latches; memory card interfaces; multiplexers; noncontact inductive-coupling data transmission link; physical channel; power reduction; rotary data encoding; size 0.18 mum; ternary logic gates; wafer-level testing; Clocks; Coils; Data communication; Decoding; Encoding; Jitter; Power demand; Binary codes; channel coding; data communication; decoding; encoding; flip-flops; inductive power transmission; logic gates;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2012.2211656