Title :
High-Performance Polycrystalline-Silicon Nanowire Thin-Film Transistors With Location-Controlled Grain Boundary via Excimer Laser Crystallization
Author :
Chao-Lung Wang ; I-Che Lee ; Chun-Yu Wu ; Chia-Hsin Chou ; Po-Yu Yang ; Yu-Ting Cheng ; Huang-Chung Cheng
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
High-performance polycrystalline-silicon (poly-Si) nanowire (NW) thin-film transistors (TFTs) are demonstrated using excimer laser crystallization to control the locations of grain boundaries two-dimensionally. Via the locally increased thickness of the amorphous-silicon (a-Si) film as the seeds, the cross-shaped grain boundary structures were produced among these thicker a-Si grids. The NW TFTs with one primary grain boundary perpendicular to the channel direction could be therefore fabricated to achieve an excellent field-effect mobility of 346 cm2/V · s and an on/off current ratio of 3 × 109. Furthermore, the grain-boundary-location-controlled NW TFTs also exhibited better reliability due to the control of grain boundary locations. This technology is thus promising for applications of low-temperature poly-Si TFTs in system-on-panel and 3-D integrated circuits.
Keywords :
crystallisation; flat panel displays; grain boundaries; nanowires; silicon; thin film transistors; three-dimensional integrated circuits; 3D integrated circuits; NW thin-hlm transistors; Si; active-matrix flat-panel displays; amorphous-silicon hlm; excimer laser crystallization; high-performance polycrystalline-silicon nanowire thin-film transistors; location-controlled grain boundary; low-temperature poly Si TFT; on-off current ratio; system-on-panel; Crystallization; Grain boundaries; Lasers; Nanowires; Thin film transistors; Excimer laser crystallization (ELC); location controlled; nanowire (NW); polycrystalline silicon (poly-Si);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2012.2211857
