Title :
Subthreshold performance of pocket-implanted silicon-on-insulator CMOS devices and circuits for ultra-low-power analogue/mixed-signal applications
Author :
Chakraborty, Shiladri ; Mallik, Abhidipta ; Sarkar, Chandan K.
Author_Institution :
ITPL, Tyfone Commun. Dev. (India) Pvt. Ltd., Bangalore, India
fDate :
7/1/2011 12:00:00 AM
Abstract :
Analogue circuits based on subthreshold operation of the devices are very attractive as they show significantly better performance in terms of both power dissipation and voltage gain. A systematic investigation, with the help of extensive process and device simulations, of the effects of halo doping [both double-halo and single-halo or lateral asymmetric channel (LAC)] on the subthreshold analogue performance of 100 nm silicon-on-insulator CMOS devices and circuits is reported for the first time. Although the halo doping is found to improve the subthreshold performance in general, the improvement is significant for a low tilt angle of the halo implant. The optimisation of the analogue performance is made for the halo devices by varying the tilt angle of the halo implant. CMOS amplifiers made with the halo-implanted devices are found to have higher voltage gain over their conventional counterpart, and a more than 70 improvement in the voltage gain is observed when both n- and p-channel transistors in the amplifier are LAC devices.
Keywords :
CMOS analogue integrated circuits; amplifiers; low-power electronics; mixed analogue-digital integrated circuits; silicon-on-insulator; CMOS amplifiers; LAC devices; analogue circuits; device simulations; double-halo doping; halo-implanted devices; lateral asymmetric channel; n-channel transistors; p-channel transistors; pocket-implanted silicon-on-insulator CMOS devices; power dissipation; single-halo doping; size 100 nm; subthreshold analogue performance; ultralow-power analogue-mixed-signal applications; voltage gain;
Journal_Title :
Circuits, Devices & Systems, IET
DOI :
10.1049/iet-cds.2010.0299