An advanced Ge preamorphization salicide technology for ultra-thin-film SOI CMOS devices

Author

Hsiao, Tommy C. ; Liu, Ping ; Woo, Jason C S

Author_Institution

Dept. of Electr. Eng., California State Univ., Los Angeles, CA, USA

Volume

18

Issue

7

fYear

1997

fDate

7/1/1997 12:00:00 AM

Firstpage

309

Lastpage

311

Abstract

In this letter, we propose a new approach to implement salicide on thin-film silicon-on-insulator (SOI) through the amorphization of the source/drain (S/D) regions by a germanium implantation. The amorphous film greatly reduces the silicide formation energy and effectively controls the silicide depth. This results in a much lower thermal cycle and increased flexibility in the choice of metal thickness. SOI NMOS devices fabricated using this novel salicide technology have shown substantially reduced S/D resistance as well as good device performance. This technology is applicable to PMOS SOI MOSFETs as well.

Keywords

CMOS integrated circuits; MOSFET; amorphisation; germanium; integrated circuit interconnections; ion implantation; rapid thermal annealing; silicon-on-insulator; Ge implantation; Ge preamorphization salicide technology; PMOS SOI MOSFET; SOI NMOS devices; Ti-Si:Ge-SiO/sub 2/; metal thickness; silicide depth control; silicide formation energy; source/drain region amorphization; thermal cycle; two-step RTA; ultra-thin-film SOI CMOS devices; Amorphous materials; CMOS technology; Degradation; Germanium; Rapid thermal annealing; Semiconductor thin films; Silicides; Silicon on insulator technology; Thermal resistance; Titanium;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.596921

Filename

596921