DocumentCode :
1288077
Title :
A multilayer neural network structure for analog filtering
Author :
Mehr, Iuri ; Sculley, Terry L.
Author_Institution :
Crystal Semicond. Corp., Austin, TX, USA
Volume :
43
Issue :
8
fYear :
1996
fDate :
8/1/1996 12:00:00 AM
Firstpage :
613
Lastpage :
618
Abstract :
The design of analog filters has been a topic of research for many years, yielding a wide variety of techniques for addressing the problem. The work described here approaches this task from a neural network perspective to obtain some of the advantages of neural systems, such as a high tolerance to component imprecision and an ability to train or adapt high-order structures. Investigations of linear filter networks utilizing neural-like system topologies are presented, along with accompanying training algorithms and simulation results. Design of a reduced interconnect network in 2 μm CMOS is suggested, with simulations indicating its potential for implementing high order, self-programming analog filters at bandwidths above 70 MHz
Keywords :
CMOS analogue integrated circuits; active filters; analogue processing circuits; feedforward neural nets; learning (artificial intelligence); neural chips; programmable filters; 2 micron; 70 MHz; CMOS IC; analog filtering; linear filter networks; multilayer neural network structure; reduced interconnect network; self-programming analog filters; training algorithms; Analog-digital conversion; Built-in self-test; Circuit testing; Digital filters; Filtering; High definition video; Multi-layer neural network; Narrowband; Neural networks; Nonlinear filters;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.532009
Filename :
532009
Link To Document :
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