DocumentCode :
1288255
Title :
Low Voltage and Low Power Divide-By-2/3 Counter Design Using Pass Transistor Logic Circuit Technique
Author :
Hwang, Yin-Tsung ; Lin, Jin-Fa
Author_Institution :
Dept. of Electr. Eng., Nat. Chung Hsing Univ., Taichung, Taiwan
Volume :
20
Issue :
9
fYear :
2012
Firstpage :
1738
Lastpage :
1742
Abstract :
An extended true-single-phase-clock (E-TSPC) based divide-by-2/3 counter design for low supply voltage and low power consumption applications is presented. By using a wired or scheme; only one transistor is needed to implement both the counting logic and the mode selection control. This can enhance the working frequency of the counter due to a reduced critical path between the E-TSPC flip flops (FFs). Since the number of transistor stacking between the power rails is kept at merely two, the proposed design is sustainable to low VDD operations (531 MHz at 0.6 V VDD) for the power saving purpose. Simulation results show that compared with two classic E-TSPC based designs in 0.18 m process technology, as much as 16.4% in operation speed and 39% in power-delay-product can be achieved by the proposed design.
Keywords :
clocks; counting circuits; flip-flops; logic circuits; logic design; prescalers; transistors; E-TSPC flip flops; E-TSPC-based divide-by-2/3 counter design; classic E-TSPC-based design; counter frequency; counting logic; extended true-single-phase-clock-based divide-by-2/3 counter design; low power consumption applications; low power divide-by-2/3 counter design; low supply voltage; low voltage divide-by-2/3 counter design; mode selection control; pass transistor logic circuit technique; power rails; power saving; power-delay product; reduced critical path; transistor stacking; Clocks; Inverters; Logic gates; MOSFETs; Power demand; Radiation detectors; Extended true-single-phase-clock flip flops (E-TSPC FF); low power; low voltage; prescaler;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2011.2161598
Filename :
5970098
Link To Document :
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