DIBL-Induced Program Disturb Characteristics in 32-nm NAND Flash Memory Array

Author

Myounggon Kang ; Wookghee Hahn ; Il Han Park ; Juyoung Park ; Youngsun Song ; Hocheol Lee ; Changgyu Eun ; Sanghyun Ju ; Kihwan Choi ; Youngho Lim ; Seunghyun Jang ; Seongjae Cho ; Byung-Gook Park ; Hyungcheol Shin

Author_Institution

Interuniv. Semicond. Res. Center, Seoul Nat. Univ., Seoul, South Korea

Volume

58

Issue

10

fYear

2011

Firstpage

3626

Lastpage

3629

Abstract

In this brief, we have investigated the program disturb characteristics caused by drain-induced barrier lowering (DIBL) in a 32-nm nand Flash memory device. It was found that the V_TH shift of the (N + 2)th erased state cell is larger than that of the (N + 1)th erased state cell if it is assumed that the channel of the Nth cell is cut off. It is revealed that the cut off is caused by a cell-to-cell coupling effect that is becoming more severe in the development of high-density Flash memory arrays.

Keywords

NAND circuits; flash memories; logic gates; DIBL-induced program disturb characteristics; NAND flash memory array; cell-to-cell coupling effect; drain-induced barrier lowering; high-density flash memory arrays; size 32 nm; Arrays; Couplings; Current measurement; Electric potential; Flash memory; Interference; Logic gates; Cell-to-cell interference; drain-induced barrier lowering (DIBL); gate-induced drain leakage (GIDL); hot-carrier injection (HCI); nand string;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2011.2161313

Filename

5970109