A 2.4-GHz 24-dBm SOI CMOS Power Amplifier With Fully Integrated Reconfigurable Output Matching Network

In this paper, the potential of load adaptation for enhanced backoff efficiency in RF power amplifiers (PAs) has been investigated through a 0.13-mum silicon-on-insulator (SOI) CMOS fabrication technology. The RF power performance of the adopted SOI CMOS process has been preliminarily characterized by on-wafer load-pull measurements on a custom unit power transistor. A 2.4-GHz 24-dBm 2-V SOI CMOS PA with fully integrated reconfigurable output matching network has then been designed and experimentally characterized. A significant efficiency improvement of up to 34% has been achieved through load adaptation, peak efficiency being as high as 65%. Linear operation has also been demonstrated under two-tone excitation, as a 16-dBm output power has been attained while complying with a - 40-dBc third-order intermodulation distortion specification.