A 2.4-GHz 24-dBm SOI CMOS Power Amplifier With Fully Integrated Reconfigurable Output Matching Network

Author

Carrara, Francesco ; Presti, Calogero D. ; Pappalardo, Fausto ; Palmisano, Giuseppe

Author_Institution

Dipt. di Ing. Elettr. Elettron. e dei Sist., Univ. di Catania, Catania, Italy

Volume

57

Issue

9

fYear

2009

Firstpage

2122

Lastpage

2130

Abstract

In this paper, the potential of load adaptation for enhanced backoff efficiency in RF power amplifiers (PAs) has been investigated through a 0.13-mum silicon-on-insulator (SOI) CMOS fabrication technology. The RF power performance of the adopted SOI CMOS process has been preliminarily characterized by on-wafer load-pull measurements on a custom unit power transistor. A 2.4-GHz 24-dBm 2-V SOI CMOS PA with fully integrated reconfigurable output matching network has then been designed and experimentally characterized. A significant efficiency improvement of up to 34% has been achieved through load adaptation, peak efficiency being as high as 65%. Linear operation has also been demonstrated under two-tone excitation, as a 16-dBm output power has been attained while complying with a - 40-dBc third-order intermodulation distortion specification.

Keywords

CMOS integrated circuits; UHF integrated circuits; UHF power amplifiers; intermodulation distortion; silicon-on-insulator; CMOS fabrication technology; SOI CMOS power amplifier; frequency 2.4 GHz; integrated reconfigurable output matching network; load adaptation; on-wafer load-pull measurement; silicon-on-insulator; size 0.13 mum; third-order intermodulation distortion; two-tone excitation; Efficiency enhancement; integrated balun; load adaptation; power amplifier (PA); reconfigurable matching network; silicon-on-insulator (SOI) CMOS; switched capacitor;

fLanguage

English

Journal_Title

Microwave Theory and Techniques, IEEE Transactions on

Publisher

ieee

ISSN

0018-9480

Type

jour

DOI

10.1109/TMTT.2009.2027078

Filename

5196683