DocumentCode :
1288473
Title :
High-temperature, low-modulus adhesive attach for large-area thin-film processing on silicon and alumina tiles
Author :
Variyam, M. ; Sundararaman, V. ; Sitaraman, Suresh K. ; Wu, Jiali ; Pike, R.T. ; Wong, C.P.
Author_Institution :
George W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Volume :
22
Issue :
4
fYear :
1999
fDate :
10/1/1999 12:00:00 AM
Firstpage :
290
Lastpage :
294
Abstract :
The fabrication of high-density interconnect structures typically involves sequential processing of alternate layers of thin organic dielectric materials and conducting copper lines. With the continued push toward low-cost fabrication, large-area processing of thin-film materials is being aggressively pursued by the electronic packaging industry. The objective of the ongoing work at Georgia Tech is to develop innovative materials, models, and processing techniques to facilitate large-area processing of alumina and silicon tiles. As the alumina and silicon tiles are commercially available in smaller dimensions, a palletization approach has been developed to facilitate large-area processing. In the palletization approach, alumina and silicon tiles are attached to re-usable glass pallets with an in-house developed thermally-stable, reworkable, and highly-compliant adhesive
Keywords :
adhesives; alumina; dielectric thin films; multichip modules; silicon; Al2O3; Cu; MCM-D; Si; adhesive; alumina tile; conducting copper line; electronic packaging; fabrication; high-density interconnect; large-area thin-film processing; organic dielectric material; palletization; silicon tile; thermomechanical model; warpage; Conducting materials; Copper; Dielectric materials; Dielectric thin films; Electronics industry; Electronics packaging; Fabrication; Silicon; Textile industry; Tiles;
fLanguage :
English
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-334X
Type :
jour
DOI :
10.1109/6104.816096
Filename :
816096
Link To Document :
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