Title :
Design of a low phase distortion GaAs FET power limiter
Author :
Parra, T. ; Gayral, M. ; Llopis, Olivier ; Pouysegur, M. ; Sautereau, Jf ; Graffeuil, J.
Author_Institution :
LAAS-CNRS, Toulouse, France
fDate :
6/1/1991 12:00:00 AM
Abstract :
A simple design technique for a GaAs FET limiter exhibiting minimum phase distortion is presented. The key idea in removing phase distortion by selecting an appropriate device and designing a bias circuit is based on the observed properties of the gate barrier under large-signal conditions. Some illustrative examples and simulation results are presented. The proposed technique is suitable for monolithic microwave integrated circuit (MMIC) design
Keywords :
III-V semiconductors; Schottky gate field effect transistors; electric distortion; equivalent circuits; gallium arsenide; microwave limiters; solid-state microwave circuits; solid-state microwave devices; FET power limiter; GaAs; MESFET; MMIC; bias circuit; design technique; gate barrier; large-signal conditions; low phase distortion; monolithic microwave integrated circuit; Circuit simulation; Distortion measurement; FETs; Gallium arsenide; Phase distortion; Phase measurement; Phased arrays; Power generation; Radio frequency; Tuners;
Journal_Title :
Microwave Theory and Techniques, IEEE Transactions on
