A simple method to determine the floating-body voltage of SOI CMOS devices

Author

Imam, Mohamed A. ; Fu, Hua ; Osman, Mohamed A. ; Osman, Ashraf A.

Author_Institution

Motorola SPS, Tempe, AZ, USA

Volume

21

Issue

1

fYear

2000

Firstpage

21

Lastpage

23

Abstract

A technique to extract the off-state floating-body (FB) voltage of silicon-on-insulator (SOI) CMOS devices is presented. The bias dependent S-parameter measurements of a single standard FB SOI device and its equivalent circuit, along with the capacitance-voltage (C-V) measurements between the drain and source of the same device, are used to determine the FB voltage. No special test structure design is needed. The technique proposes a method for the extraction of the parasitic source, drain, and gate resistances. Using the technique, FB voltage in excess of 0.4 V is measured in a partially depicted (PD) NMOS device at drain voltage of 2.5 V and zero gate voltage.

Keywords

CMOS integrated circuits; MOSFET; S-parameters; equivalent circuits; semiconductor device measurement; silicon-on-insulator; voltage measurement; 0.4 V; 2.5 V; MOSFET; SOI CMOS devices; bias dependent S-parameter measurements; capacitance-voltage measurements; drain resistance; drain voltage; equivalent circuit; gate resistance; gate voltage; off-state floating-body voltage determination; parasitic source resistance; partially depicted NMOS device; Capacitance measurement; Capacitance-voltage characteristics; Circuit testing; Electrical resistance measurement; Equivalent circuits; MOS devices; Measurement standards; Scattering parameters; Silicon on insulator technology; Voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.817440

Filename

817440