Title :
Gain-Enhanced Distributed Amplifier Using Negative Capacitance
Author :
Ghadiri, Aliakbar ; Moez, Kambiz
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Alberta, Edmonton, AB, Canada
Abstract :
This paper presents a new high-gain structure for the distributed amplifier. Negative capacitance cells are exploited to ameliorate the loading effects of parasitic capacitors of gain cells in order to improve the gain of the distributed amplifier while keeping the desired bandwidth. In addition, the negative capacitance circuit creates a negative resistance that can be used to increase the amplifier bandwidth. Implemented in 0.13-μm IBM´s CMRF8SF CMOS, the proposed six-stage distributed amplifier presents an average gain of 13.2 dB over a bandwidth of 29.4 GHz. The measured input return loss is less than -9 dB and the output return loss is less than -9.5 dB over the entire bandwidth. With a chip area of 1.5 mm × 0.8 mm, the amplifier consumes 136 mW from a 1.5-V dc power supply.
Keywords :
CMOS integrated circuits; capacitance; capacitors; distributed amplifiers; IBM CMRF8SF CMOS; amplifier bandwidth; bandwidth 29.4 GHz; gain 13.2 dB; gain cells; gain-enhanced distributed amplifier; negative capacitance; parasitic capacitors; power 136 mW; size 0.13 mum; size 0.8 mm; size 1.5 mm; voltage 1.5 V; Bandwidth; Capacitance; Capacitors; Circuits; Distributed amplifiers; Electrical resistance measurement; Gain; Integrated circuit modeling; Loss measurement; Parasitic capacitance; Power amplifiers; Power supplies; Power transmission lines; Transistors; CMOS distributed amplifier; gain boosting technique; negative capacitance; negative resistance; wideband amplifier;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2010.2055610
