Title :
A new model for the description of gate voltage and temperature dependence of gate induced drain leakage (GIDL) in the low electric field region [DRAMs]
Author :
Rosar, Markus ; Leroy, Bernard ; Schweeger, Giorgio
Author_Institution :
Siemens SA, Corbeil-Essonnes, France
fDate :
1/1/2000 12:00:00 AM
Abstract :
Gate induced drain leakage (GIDL) is frequently described by band-to-band tunneling. This mechanism is insensitive to temperature and occurs only under strong electric fields. Under the condition of small electric fields, however, GIDL exhibits a strong dependence on temperature, which is due to trap-assisted generation of electron hole pairs. This generation mechanism is based on the Shockley-Read-Hall (SRH) equation involving field dependent emission probabilities due to Fowler-Nordheim (FN) and Poole-Frenkel effect. The proposed model of an acceptor-like interface trap is able to reproduce the experimental results. Temperature and voltage dependencies for a p-MOSFET are correctly calculated for one single fitting parameter, i.e., the interface trap density corresponding to Nt=1×1014 (1/eV m2)
Keywords :
DRAM chips; MOS memory circuits; MOSFET; Poole-Frenkel effect; electron traps; integrated circuit modelling; integrated circuit testing; leakage currents; Fowler-Nordheim effect; Poole-Frenkel effect; Shockley-Read-Hall equation; acceptor-like interface trap; electron hole pairs; field dependent emission probabilities; fitting parameter; gate induced drain leakage; gate voltage; interface trap density; temperature dependence; trap-assisted generation; voltage dependencies; Capacitors; Charge carrier processes; Degradation; Electron traps; MOSFET circuits; Random access memory; Space charge; Temperature dependence; Tunneling; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on