DocumentCode
129203
Title
Scalability bottlenecks discovery in MPSoC platforms using data mining on simulation traces
Author
Lagraa, Sofiane ; Termier, Alexandre ; Petrot, Frederic
Author_Institution
LIG, Univ. Grenoble Alpes, Grenoble, France
fYear
2014
fDate
24-28 March 2014
Firstpage
1
Lastpage
6
Abstract
Nowadays, a challenge faced by many developers is the profiling of parallel applications so that they can scale over more and more cores. This is especially critical for embedded systems powered by Multi-Processor System-on-Chip (MPSoC), where ever demanding applications have to run smoothly on numerous cores, each with modest power budget. The reasons for the lack of scalability of parallel applications are numerous, and it can be time consuming for a developer to pinpoint the correct one. In this paper, we propose a fully automatic method which detects the instructions of the code which lead to a lack of scalability. The method is based on data mining techniques exploiting low level execution traces produced by MPSoC simulators. Our experiments show the accuracy of the proposed technique on five different kinds of applications, and how the information reported can be exploited by application developers.
Keywords
data mining; embedded systems; multiprocessing systems; system-on-chip; MPSoC platforms; data mining; embedded systems; low level execution traces; multiprocessor system on chip; parallel applications; scalability bottlenecks discovery; simulation traces; Clustering algorithms; Data mining; Feature extraction; Program processors; Scalability; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
Conference_Location
Dresden
Type
conf
DOI
10.7873/DATE.2014.199
Filename
6800400
Link To Document