DocumentCode :
129230
Title :
Extreme-scale computer architecture: Energy efficiency from the ground up
Author :
Torrellas, Josep
Author_Institution :
Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
fYear :
2014
fDate :
24-28 March 2014
Firstpage :
1
Lastpage :
5
Abstract :
As we move to integration levels of 1,000-core processor chips, it is clear that energy and power consumption are the most formidable obstacles. To construct such a chip, we need to rethink the whole compute stack from the ground up for energy efficiency - and attain Extreme-Scale Computing. First of all, we want to operate at low voltage, since this is the point of maximum energy efficiency. Unfortunately, in such an environment, we have to tackle substantial process variation. Hence, it is important to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point. At the architecture level, we require simple cores organized in a hierarchy of clusters. Moreover, we also need techniques to reduce the leakage of on-chip memories and to lower the voltage guardbands of logic. Finally, data movement should be minimized, through both hardware and software techniques. With a systematic approach that cuts across multiple layers of the computing stack, we can deliver the required energy efficiencies.
Keywords :
multiprocessing systems; parallel architectures; power aware computing; computing stack; core cluster hierarchy; energy consumption; energy efficiency; extreme-scale computer architecture; hardware techniques; on-chip memories; power consumption; software techniques; voltage guardbands; voltage regulation; Computer architecture; Hardware; Organizations; Power demand; System-on-chip; Transistors; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
Conference_Location :
Dresden
Type :
conf
DOI :
10.7873/DATE.2014.213
Filename :
6800414
Link To Document :
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