Title :
A digital differential-line receiver for CMOS VLSI currents
Author :
Anglada, R. ; Rubio, A.
Author_Institution :
Dept. of Electron. Eng., Polytech. Univ. of Catalunya, Barcelona, Spain
fDate :
6/1/1991 12:00:00 AM
Abstract :
Interferences due to parasitic capacitances between close circuits leading to undesired logic behaviors in VLSI circuits are considered. A CMOS differential-line receiver is proposed to avoid the effect of these perturbances. The receiver reaches a differential and common-node noise immunity which is higher than the circuit power supply voltage
Keywords :
CMOS integrated circuits; VLSI; digital integrated circuits; CMOS VLSI currents; common-node noise immunity; digital differential-line receiver; logic behaviors; parasitic capacitances; CMOS logic circuits; CMOS technology; Circuit noise; Crosstalk; Logic circuits; Parasitic capacitance; Power supplies; Threshold voltage; Very large scale integration; Wires;
Journal_Title :
Circuits and Systems, IEEE Transactions on
