Near-optimal quadratic-based placement for a class of IC layout problems

Near-optimal placement has long been a coveted goal of IC layout algorithms. Progress has been hindered because theoretical bounds on placement quality were unavailable. Such bounds may be obtained for the quadratic metric proposed here. In order to compare traditional placement techniques to these bounds, fast pairwise-interchange techniques were applied to placements of homogeneous interchangeable devices on square grids for problem sizes of 100 to 1600 devices. A theoretical model was developed that quantitatively explains the deviation from optimal placement quality. Both the experimental and theoretical results indicate an asymptotic approach to optimality with large problem sizes.