DocumentCode
1293099
Title
Performance analysis and optimization of mixed asynchronous synchronous systems
Author
Teich, Jurgen ; Thiele, Lothar ; Sriram, Sundararajan ; Martin, Michael
Author_Institution
Inst. TIK, Eidgenossische Tech. Hochschule, Zurich, Switzerland
Volume
16
Issue
5
fYear
1997
fDate
5/1/1997 12:00:00 AM
Firstpage
473
Lastpage
484
Abstract
This paper deals with the system-level performance analysis and optimization of a class of digital systems we call mixed asynchronous-synchronous systems. In such a system, each computation module is either synchronous or asynchronous. The communication among all of the modules is assumed to be data driven. In order to adequately describe the timing of such architectures, we introduce a graph model called MASS, which is based on several extensions of timed marked graphs. The first extension is that the node set V is partitioned into synchronous and asynchronous nodes. A synchronous node can only fire at ticks of its local module clock. Based on these extensions, we analyze the behavior of MASS, in particular, period, periodicity, and maximal throughput rate. Finally, we introduce the optimization problem of assigning appropriate clock phases to synchronous nodes so to maximize the throughput rate of the resulting system. An exact solution as well as a polynomial time algorithm for nearly optimal phase assignment are presented
Keywords
circuit optimisation; graph theory; logic design; timing; MASS; clock phase; digital system; mixed asynchronous synchronous system; node set; optimization; polynomial time algorithm; system-level performance analysis; time marked graph; Circuits; Clocks; Costs; Delay; Digital systems; Embedded computing; Performance analysis; Signal design; Throughput; Timing;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.631210
Filename
631210
Link To Document