Title :
Pass-XNOR logic: A new logic style for P-N junction based graphene circuits
Author :
Tenace, Valerio ; Calimera, A. ; Macii, E. ; Poncino, Massimo
Author_Institution :
Dipt. di Autom. e Inf., Politec. di Torino, Turin, Italy
Abstract :
In this work we introduce a new logic style for p-n junctions based digital graphene circuits: the pass-XNOR logic style. The latter enables the realization of compact, energy efficient circuits that better exploit the characteristics of graphene. We first show how a single p-n junction can be conceived as a pass-XNOR gate, i.e., a transmission gate with embedded logic functionality, the XNOR Boolean operator. Secondly, we propose a smart integration strategy in which series/parallel connections of pass-XNOR gates allow to implement AND/OR logical conjunctions, and, therefore, all possible truth tables. Experimental results conducted on a set of representative logic functions show the superior of pass-XNOR logic circuits w.r.t. standard CMOS circuits and graphene circuits that use p-n junctions in a complementary-like structure.
Keywords :
CMOS logic circuits; graphene; logic gates; p-n junctions; AND-OR logical conjunctions; CMOS circuits; XNOR Boolean operator; complementary-like structure; embedded logic functionality; energy efficient circuits; p-n junctions based digital graphene circuits; pass-XNOR logic style; smart integration strategy; transmission gate; truth tables; CMOS integrated circuits; Doping; Graphene; Logic functions; Logic gates; P-n junctions;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
Conference_Location :
Dresden
DOI :
10.7873/DATE.2014.275