Title :
Truncation noise in fixed-point SFGs [digital filters]
Author :
Constantinides, G.A. ; Cheung, P.Y.K. ; Luk, W.
Author_Institution :
Electr. & Electron. Eng. Dept., Imperial Coll. of Sci., Technol. & Med., London, UK
fDate :
11/11/1999 12:00:00 AM
Abstract :
A new model for predicting truncation error variance in fixed-point filter implementations is introduced. The proposed model is shown to be more accurate than existing models, particularly for some direct hardware implementations. In addition, some comments are made on the applicability of existing error models
Keywords :
digital filters; error analysis; field programmable gate arrays; fixed point arithmetic; high level synthesis; noise; prediction theory; signal flow graphs; CAD; FPGA implementation; HLS; digital filter synthesis; direct hardware implementations; error models; fixed-point SFGs; fixed-point filter implementations; truncation error variance prediction; truncation noise;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19991375
