DocumentCode
1293504
Title
Universality considerations in VLSI circuits
Author
Valiant, Leslie G.
Author_Institution
Dept. of Computer Sci., Univ. of Edinburgh, Edinburgh, UK
Issue
2
fYear
1981
Firstpage
135
Lastpage
140
Abstract
The problem of embedding the interconnection pattern of a circuit into a two-dimensional surface of minimal area is discussed. Since even for some natural patterns graphs containing m connections may require Ω(m2) area, in order to achieve compact embeddings restricted classes of graphs have to be considered. For example, arbitrary trees (of bounded degree) can be embedded in linear area without edges crossing over. Planar graphs can be embedded efficiently only if crossovers are allowed in the embedding.
Keywords
digital integrated circuits; graph theory; logic design; VLSI circuits; compact embeddings; crossovers; graph theory; interconnection pattern; logic design; natural patterns graphs; universality; Algorithm design and analysis; Computers; Integrated circuit interconnections; Minimization; Sufficient conditions; Upper bound; Very large scale integration; Area minimization; VLSI; circuits; embeddings; graphs; universality;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1981.6312176
Filename
6312176
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