Title :
A Low-Flicker Noise Gate-Controlled Lateral–Vertical Bipolar Junction Transistor Array With 55-nm CMOS Technology
Author :
Shuo-Mao Chen ; Yean-Kuen Fang ; Feng-Renn Juang ; Chia-Chung Chen ; Liu, Siyuan ; Chin-Wei Kuo ; Chih-Ping Chao ; Hua-Chou Tseng
Author_Institution :
Dept. of Electr. En gineering, Nat. Cheng Kung Univ., Tainan, Taiwan
Abstract :
The low-flicker noise (1/f noise) gate-controlled lateral-vertical bipolar junction transistor array (GC-LV-BJTA) is developed with a foundry´s 55-nm CMOS technology for low-noise and low-power RF circuit applications. The GC-LV-BJTA is formed by paralleling some unit cells into an array structure for sharing adjacent collectors and bases, thus minimizing the total area. Many efforts, including the use of a deep n-well, a novel layout, an optimized emitter perimeter/area ratio, and a negatively biased gate, have been implemented to suppress the noise level and enhance the current gain. As a result, the GC-LV-BJTA, consisting of 16 unit cells with a 0.16-μm gate length, achieves a high gain of 85.7 with available low 1/f noise level, as compared with the nMOS or SiGe HBT.
Keywords :
1/f noise; CMOS integrated circuits; bipolar transistors; flicker noise; low-power electronics; radiofrequency integrated circuits; semiconductor device noise; CMOS technology; GC-LV-BJTA; HBT; lateral-vertical bipolar junction transistor array; low-flicker noise gate-controlled transistor array; low-noise RF circuit application; low-power RF circuit application; nMOS; noise level suppression; size 0.16 mum; size 55 nm; unit cells; Heterojunction bipolar transistors; Integrated circuits; Layout; Logic gates; Noise; Noise level; Radio frequency; CMOS; RF; SiGe HBT; flicker noise; gate-controlled lateral–vertical bipolar junction transistor (GC-LV-BJT);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2011.2161312
