Synthesis algorithm of parallel index generation units

The index generation function is a multi-valued logic function which checks if the given input vector is a registered or not, and returns its index value if the vector is registered. If the latency of the operation is critical, dedicated hardware is used for implementing the index generation functions. This paper proposes a method implementing the index generation functions using parallel index generation units. A novel and efficient algorithm called `conflict free partitioning´ is proposed to synthesis parallel index generation units. Experimental results show the proposed method outperforms other existing methods.