DocumentCode
129422
Title
Hardware primitives for the synthesis of multithreaded elastic systems
Author
Dimitrakopoulos, G. ; Seitanidis, I. ; Psarras, A. ; Tsiouris, K. ; Mattheakis, Pavlos M. ; Cortadella, Jordi
Author_Institution
Electr. & Comput. Eng., Democritus Univ. of Thrace, Xanthi, Greece
fYear
2014
fDate
24-28 March 2014
Firstpage
1
Lastpage
4
Abstract
Elastic systems operate in a dataflow-like mode using a distributed scalable control and tolerating variable-latency computations. At the same time, multithreading increases the utilization of processing units and hides the latency of each operation by time-multiplexing operations of different threads in the datapath. This paper proposes a model to unify multithreading and elasticity. A new multithreaded elastic control protocol is introduced supported by low-cost elastic buffers that minimize the storage requirements without sacrificing performance. To enable the synthesis of multithreaded elastic architectures, new hardware primitives are proposed and utilized in two circuit examples to prove the applicability of the proposed approach.
Keywords
buffer circuits; distributed control; microprocessor chips; multi-threading; protocols; dataflow-like mode; datapath; distributed scalable control; hardware primitives; low-cost elastic buffers; multithreaded elastic control protocol; multithreaded elastic systems; processing units; time-multiplexing operations; variable-latency computations; Instruction sets; Pipelines; Protocols; Registers; Synchronization; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
Conference_Location
Dresden
Type
conf
DOI
10.7873/DATE.2014.314
Filename
6800515
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