DocumentCode :
129530
Title :
Image progressive acquisition for hardware systems
Author :
Jianxiong Liu ; Bouganis, Christos ; Cheung, Peter Y. K.
Author_Institution :
Dept. of Electr. & Electron. Eng., Imperial Coll. London, London, UK
fYear :
2014
fDate :
24-28 March 2014
Firstpage :
1
Lastpage :
6
Abstract :
As the resolution of digital images increases, accessing raw image data from memory has become a major consideration during the design of image/video processing systems. This is due to the fact that the bandwidth requirement and energy consumption of such image accessing process has increased. Inspired by the successful application of progressive image sampling techniques in many image processing tasks, this work proposes to apply similar concept within hardware systems to efficiently trade image quality for reduced memory bandwidth requirement and lower energy consumption. Based on this idea, a hardware system is proposed that is placed between the memory subsystem and the processing core of the design. The proposed system alters the conventional memory access pattern to progressively and adaptively access pixels from a target memory external to the system. The sampled pixels are used to reconstruct an approximation to the ground truth, which is stored in an internal image buffer for further processing. The system is prototyped on FPGA and its performance evaluation shows that a saving of up to 85% of memory accessing time and 33%/45% of image acquisition time/energy is achieved on the benchmark image “lena” while maintaining a PSNR of about 30 dB.
Keywords :
energy consumption; field programmable gate arrays; image sampling; integrated memory circuits; logic design; FPGA; PSNR; bandwidth requirement; digital images; energy consumption; hardware systems; image accessing process; image acquisition time/energy; image buffer; image processing; image progressive acquisition; image quality; image sampling; image/video processing systems; memory access pattern; memory subsystem; raw image data; Bandwidth; Energy consumption; Hardware; Image reconstruction; Memory management; PSNR; Random access memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
Conference_Location :
Dresden
Type :
conf
DOI :
10.7873/DATE.2014.368
Filename :
6800569
Link To Document :
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