A switched-capacitor charge-balancing analog-to-digital converter and its application to capacitance measurement

An analog-to-digital converter is developed based on the charge-balancing principle. It consists of a switched-capacitor integrator, comparator, and digital logic circuit. Driven by the two phase clock, the integrator accumulates consecutively the incremental signal charge while extracting the quantized reference charge from the accumulated signal charge each time its output becomes positive, to keep their charge balance. The ratio between the accumulated and extracted frequencies for a given period of time then provides the digital representation of an input analog signal. A conversion accuracy higher than 14 bits can be expected from its integrated realization because the offset voltage and the finite open-loop gain of an op-amp and the parasitic capacitance have no effect upon the conversion process. It also features a small device-count integrate onto a very small chip area. Some applications are also presented to demonstrate its validity.