• DocumentCode
    1295812
  • Title

    A new self-routing multicast network

  • Author

    Yang, Yuanyuan ; Wang, Jianchao

  • Author_Institution
    Dept. of Electr. & Comput. Eng., State Univ. of New York, Stony Brook, NY, USA
  • Volume
    10
  • Issue
    12
  • fYear
    1999
  • fDate
    12/1/1999 12:00:00 AM
  • Firstpage
    1299
  • Lastpage
    1316
  • Abstract
    In this paper, we propose a design for a new self-routing multicast network which can realize arbitrary multicast assignments between its inputs and outputs without any blocking. The network design uses a recursive decomposition approach and is based on the binary radix sorting concept. All functional components of the network are reverse banyan networks. Specifically, the new multicast network is recursively constructed by cascading a binary splitting network and two half-size multicast networks. The binary splitting network, in turn, consists of two recursively constructed reverse banyan networks. The first reverse banyan network serves as a scatter network and the second reverse banyan network serves as a quasisorting network. The advantage of this approach is to provide a way to self-route multicast assignments through the network and a possibility to reuse part of network to reduce the network cost. The new multicast network we design is compared favorably with the previously proposed multicast networks. It uses O(n log2 n) logic gates, and has O(log2 n) depth and O(log2 n) routing time where the unit of time is a gate delay. By reusing part of the network, the feedback implementation of the network can further reduce the network cost to O(n log n)
  • Keywords
    communication complexity; distributed processing; multistage interconnection networks; binary radix sorting concept; binary splitting network; feedback implementation; half-size multicast networks; multicast assignments; recursive decomposition approach; reverse banyan networks; self-routing multicast network; Costs; Delay effects; Distributed databases; Feedback; Hardware; Logic gates; Routing; Scattering; Sorting; Switches;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/71.819951
  • Filename
    819951