DocumentCode :
1295870
Title :
A 78 \\sim 102 GHz Front-End Receiver in 90 nm CMOS Technology
Author :
Su, Hsuan-Yi ; Hu, Robert ; Wu, Chung-Yu
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
21
Issue :
9
fYear :
2011
Firstpage :
489
Lastpage :
491
Abstract :
In this letter, a 78 ~ 102 GHz front-end receiver designed in 90 nm CMOS technology is presented. It consists of an ultra-wideband low-noise amplifier, a subharmonic mixer, and an IF buffer. This receiver has a peak gain of 11.8 dB at 94 GHz with the noise figure of 13.4 dB. The measured input-referred 1 dB compression point is -14.5 dBm and the total power dissipation is 18.6 mW. The chip size is 680 × 1020 μm2.
Keywords :
CMOS integrated circuits; field effect MIMIC; radio receivers; CMOS technology; IF buffer; frequency 78 GHz to 102 GHz; front-end receiver; gain 11.8 dB; noise figure 13.4 dB; power 18.6 mW; power dissipation; size 90 nm; subharmonic mixer; ultra-wideband low-noise amplifier; CMOS integrated circuits; Gain; Mixers; Noise; Radio frequency; Receivers; Semiconductor device measurement; CMOS receiver; W-band; low noise amplifier (LNA); subharmonic mixer; ultra wideband (UWB);
fLanguage :
English
Journal_Title :
Microwave and Wireless Components Letters, IEEE
Publisher :
ieee
ISSN :
1531-1309
Type :
jour
DOI :
10.1109/LMWC.2011.2162940
Filename :
5982100
Link To Document :
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