• DocumentCode
    1295912
  • Title

    Translation-lookaside buffer consistency

  • Author

    Teller, Patricia J.

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • Volume
    23
  • Issue
    6
  • fYear
    1990
  • fDate
    6/1/1990 12:00:00 AM
  • Firstpage
    26
  • Lastpage
    36
  • Abstract
    Nine solutions to the cache consistency problem for shared-memory multiprocessors with multiple translation-lookaside buffers (TLBs) are described. A TLB´s function is defined, and it is shown how TLB inconsistency arises in uniprocessor and multiprocessor architectures. The problem of TLB consistency is solved in a uniprocessor and in multiprocessors with a shared bus, virtual-address caches, and hardware cache consistency. Solutions that can be implemented in multiprocessors with more general interconnection networks and without hardware cache consistency are presented.<>
  • Keywords
    buffer storage; memory architecture; multiprocessing systems; cache consistency problem; hardware cache consistency; multiple translation-lookaside buffers; shared bus; shared-memory multiprocessors; virtual-address caches; Hardware; Multiprocessor interconnection networks;
  • fLanguage
    English
  • Journal_Title
    Computer
  • Publisher
    ieee
  • ISSN
    0018-9162
  • Type

    jour

  • DOI
    10.1109/2.55498
  • Filename
    55498