DocumentCode :
1296186
Title :
A scheduler ASIC for a programmable packet switch
Author :
Zhang, L. Louis ; Beacham, Brent ; Hashemi, Mohammed R. ; Chow, Paul ; Leon-Garcia, Alberto
Author_Institution :
QoS Express Inc., Toronto, Ont., Canada
Volume :
20
Issue :
1
fYear :
2000
Firstpage :
42
Lastpage :
48
Abstract :
While the Internet is successful in supporting traditional data-only traffic, an integrated services Internet is inevitable with the emergence of new applications such as voice, video, multimedia, and interactive video conferencing. Such an integrated services network should support a wide range of applications with diverse quality of service requirements and traffic characteristics. Provision for quality of service in packet networks in general, and in the Internet in particular, is the focus of most of the recent developments in switching and routing system design. We designed a generic, single-queue scheduler engine for use in a programmable packet switch/router to handle IP packets, ATM cells, or a combination of both. Comprising 275,000 gates, the 0.35-micron ASIC is incorporated into a prototype programmable packet switch
Keywords :
Internet; application specific integrated circuits; asynchronous transfer mode; network routing; packet switching; quality of service; ATM cells; IP packets; integrated services Internet; programmable packet switch; quality of service requirements; routing system design; scheduler ASIC; single-queue scheduler engine; Application specific integrated circuits; IP networks; Intserv networks; Packet switching; Quality of service; Routing; Switches; Telecommunication traffic; Videoconference; Web and internet services;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.820052
Filename :
820052
Link To Document :
بازگشت