Title :
Physical Origins of Threshold Voltage Variation Enhancement in Si(110) n/pMOSFETs
Author :
Saitoh, Masumi ; Yasutake, Nobuaki ; Nakabayashi, Yukio ; Uchida, Ken ; Numata, Toshinori
Author_Institution :
Adv. LSI Technol. Lab., Toshiba Corp., Yokohama, Japan
Abstract :
Threshold voltage Vth variations in scaled (110) n/pMOSFETs are systematically investigated. Vth variations in (110) nMOSFETs and pMOSFETs with high channel dose are larger than those in (100) nMOSFETs and pMOSFETs, respectively. Physical origins of Vth variation enhancement in (110) MOSFETs are analyzed on the basis of the substrate impurity concentration dependence of the body effect and S factor variations. It is found that the depletion width variations due to boron ion channeling and the interface trap density variations enhance Vth variations in boron-doped (110) nMOSFETs and that the interface fixed charge variations enhance Vth variations in arsenic-doped (110) pMOSFETs. An undoped channel combined with a steep boron profile and moderate phosphorus doping into the surface are desirable to minimize Vth variations in (110) nMOSFETs and pMOSFETs, respectively.
Keywords :
MOSFET; arsenic; boron; elemental semiconductors; interface states; silicon; S-factor variations; Si(110) n-MOSFET; Si(110) pMOSFET; Si:As; Si:B; body effect; boron ion channeling; interface fixed charge variations; interface trap density variations; substrate impurity concentration dependence; threshold voltage variation enhancement; Boron; Dielectric measurements; Doping; Doping profiles; Electron mobility; Fluctuations; Impurities; Logic gates; MOSFETs; Research and development; Resource description framework; Substrates; Technological innovation; Threshold voltage; (110); Channeling; MOSFETs; depletion width; fixed charge; interface trap; threshold voltage; variations;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2010.2059592
