• DocumentCode
    1296991
  • Title

    Lanthanum-Oxide-Doped Nitride Charge-Trap Layer for a TANOS Memory Device

  • Author

    Jong Kyung Park ; Youngmin Park ; Seok-Hee Lee ; Sung Kyu Im ; Jae Sub Oh ; Moon Sig Joo ; Kwon Hong ; Byung Jin Cho

  • Author_Institution
    Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
  • Volume
    58
  • Issue
    10
  • fYear
    2011
  • Firstpage
    3314
  • Lastpage
    3320
  • Abstract
    A charge-trap-type Flash memory with a La2O3 -doped Si3N4 charge-trapping layer is demonstrated for the first time. An ultrathin La2O3 layer is inserted in the middle of a Si3N4 layer, followed by high-temperature annealing to mix the two layers. The La2O3-doped Si3N4 layer, irrespective of Si3N4 deposition processes, is found to provide deep charge-trapping sites, resulting in an excellent pre-/postcycling retention property and high reliability. The optimization of the La2O3 layer thickness and position in the Si3N4 trapping layer has been also systematically studied.
  • Keywords
    annealing; flash memories; lanthanum compounds; silicon compounds; Si3N4:La2O3; TANOS memory device; charge-trap-type Flash memory; charge-trapping sites; deposition process; high-temperature annealing; lanthanum-oxide-doped nitride charge-trap layer; reliability; Aluminum oxide; Charge carrier processes; Doping; Energy states; Flash memory; Logic gates; $hbox{TaN/Al}_{2}hbox{O}_{3}/hbox{Si}_{3} hbox{N}_{4}/hbox{SiO}_{2}/hbox{Si}$ (TANOS); Charge-trap Flash memory; lanthanum oxide; nitride; retention; trapping energy level;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2011.2161993
  • Filename
    5983430