Title :
Fast prototyping of datapath-intensive architectures
Author :
Rabaey, J.M. ; Chu, C. ; Hoang, P. ; Potkonjak, M.
Author_Institution :
California Univ., Berkeley, CA, USA
fDate :
6/1/1991 12:00:00 AM
Abstract :
A description is given of Hyper, a synthesis environment for real-time systems with datapath-intensive architectures. Hyper uses a single, global quality measure throughout the system to drive the exploration of the design space. This approach effectively merges the allocation of hardware, the application of transformations, and the handling of hierarchy in a consistent way. Hyper´s modular organization around a central database also allows new software modules to be introduced easily. The discussion covers behavioral specification, module selection, exploring the design space, transformations, scheduling and assignment, and hardware mapping. Four versions of an IIR filter generated using Hyper and Lager IV are compared. It is seen that layouts generated using Hyper are more area efficient than layouts done using the more traditional methods based on one-to-one mapping or the use of multiprocessors.<>
Keywords :
circuit layout CAD; digital filters; real-time systems; Hyper; IIR filter; assignment; behavioral specification; central database; datapath-intensive architectures; design space; fast prototyping; global quality measure; hardware allocation; hardware mapping; module selection; real-time systems; scheduling; software modules; synthesis environment; transformations; Clocks; Costs; Field programmable gate arrays; Frequency; Hardware; Pipeline processing; Prototypes; Real time systems; Signal processing algorithms; Viterbi algorithm;
Journal_Title :
Design & Test of Computers, IEEE