A Commercial 65 nm CMOS Technology for Space Applications: Heavy Ion, Proton and Gamma Test Results and Modeling

Author

Roche, Philippe ; Gasiot, Gilles ; Uznanski, Slawosz ; Daveau, Jean-Marc ; Torras-Flaquer, Josep ; Clerc, Sylvain ; Harboe-Sorensen, Reno

Author_Institution

Central CAD & Design Solutions, STMicroelectronics, Crolles, France

Volume

57

Issue

4

fYear

2010

Firstpage

2079

Lastpage

2088

Abstract

This paper presents new experimental and modeling evidences that advanced commercial CMOS technologies get intrinsically harder against space radiations with technology downscaling. A 65 nm commercial bulk CMOS process can deliver improved radiation-tolerance without sacrificing electrical performance.

Keywords

CMOS integrated circuits; gamma-ray effects; ion beam effects; proton effects; radiation hardening (electronics); CMOS technology; electronic circuits; gamma test results; heavy ion test results; proton test results; radiation hardening; radiation-tolerance; space radiations; CMOS integrated circuits; CMOS technology; Circuit simulation; Circuit testing; Flip-flops; Libraries; Neutrons; Paper technology; Protons; Radiation hardening; Random access memory; Semiconductor device modeling; Single event upset; Space technology; Temperature measurement; CMOS; electronic circuits; radiation hardening; space technology;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2010.2041790

Filename

5550319