A cobalt salicide CMOS process with TiN-strapped polysilicon gates

Author

Pfiester, James R. ; Mele, Thomas C. ; Limb, Young ; Jones, Robert E. ; Woo, Michael ; Boeck, Bruce ; Gunderson, Craig D.

Author_Institution

Motorola Inc., Austin, TX, USA

Volume

12

Issue

6

fYear

1991

fDate

6/1/1991 12:00:00 AM

Firstpage

350

Lastpage

352

Abstract

A submicrometer CMOS technology with MOSFET structures consisting of a TiN-strapped polysilicon gate electrode and self-aligned cobalt silicided source/drain junctions is developed. It is shown that the TiN-strapped gates provide a low-sheet-resistance gate electrode without threshold voltage instabilities caused by the lateral dopant interdiffusion of silicided gates. Cobalt silicide creep over the sidewall spacer, which can result in bridging between the source/drain and gate, is also eliminated. Since the source-drain regions are silicided with CoSi/sub 2/, shallow, low-leakage junctions are obtained.<>

Keywords

CMOS integrated circuits; cobalt compounds; integrated circuit technology; metallisation; semiconductor technology; titanium compounds; CoSi/sub 2/-Si; MOSFET structures; TiN-Si gate; TiN-strapped polysilicon gate electrode; low-leakage junctions; low-sheet-resistance gate electrode; polycrystalline Si gate; salicide CMOS process; salicided drain junction; salicided source junction; self aligned CoSi/sub 2/; submicrometer CMOS technology; Annealing; CMOS process; Cobalt; Electrodes; MOSFET circuits; Oxidation; Silicides; Silicon; Threshold voltage; Tin;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.82084

Filename

82084