DocumentCode :
129806
Title :
Chip-scale reconfigurable phased-array sonic communication
Author :
Hoople, Jason ; kuo, jay ; Ardanuc, Serhan ; Lal, Amit
Author_Institution :
SonicMEMS Lab., Cornell Univ., Ithaca, NY, USA
fYear :
2014
fDate :
3-6 Sept. 2014
Firstpage :
479
Lastpage :
482
Abstract :
As CMOS electronics scale to smaller dimensions, wired interconnect density, power consumption, and delays have introduced bottlenecks in performance. Ultrasonic communication links integrated within the silicon substrate offer an opportunity to create low power high data rate channels. We have utilized ultrasonic phased arrays, micro-sonars, for reconfigurable communication links. Brand new vistas in computer architecture and low power computing are enabled by these links, including brain inspired computing. This paper demonstrates the use of phased array elements to create a reconfigurable 120 Mbit per second channel in silicon. The array is capable of selectively communicating to four different locations on chip.
Keywords :
acoustic applications; reconfigurable architectures; silicon; sonar arrays; telecommunication channels; ultrasonic propagation; CMOS electronics; bottlenecks; brain inspired computing; chip-scale reconfigurable phased-array sonic communication; computer architecture; delays; low power computing; low power high data rate channels; microsonars; power consumption; reconfigurable 120 Mbit per second channel; reconfigurable communication links; silicon substrate; ultrasonic communication links; ultrasonic phased arrays; wired interconnect density; Acoustics; CMOS integrated circuits; Phased arrays; Radio frequency; Silicon; Transducers; Wires; AlN; MEMS; SONAR; communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Ultrasonics Symposium (IUS), 2014 IEEE International
Conference_Location :
Chicago, IL
Type :
conf
DOI :
10.1109/ULTSYM.2014.0119
Filename :
6932264
Link To Document :
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