• DocumentCode
    1298146
  • Title

    CMOS output stages for low-voltage power supplies

  • Author

    Palmisano, G. ; Palumbo, G. ; Salerno, R.

  • Author_Institution
    DEES, Catania Univ., Italy
  • Volume
    47
  • Issue
    2
  • fYear
    2000
  • fDate
    2/1/2000 12:00:00 AM
  • Firstpage
    96
  • Lastpage
    104
  • Abstract
    Compact and power-efficient CMOS output stages are presented and compared by designing two low-voltage operational amplifiers with similar gain and gain-bandwidth performance. The amplifiers were realized in a standard 1.2-μm CMOS process with threshold voltages around 0.8 V and using a 1.5-V power supply. They achieve an open-loop gain and a gain-bandwidth product close to 65 dB and 1 MHz, respectively. By connecting them in unity-gain configuration and delivering a 1-V peak-to-peak output voltage into a 500 Ω and 50 pF load, total harmonic distortions of -77 and -67 dB can be achieved, while using quiescent currents as low as 50 μA in the output branches
  • Keywords
    CMOS analogue integrated circuits; harmonic distortion; low-power electronics; operational amplifiers; power supply circuits; 1.2 micron; 1.5 V; 65 dB; CMOS output stage; gain-bandwidth product; low-voltage power supply; open-loop gain; operational amplifier; quiescent current; threshold voltage; total harmonic distortion; unity-gain configuration; CMOS process; CMOS technology; Circuits; Energy consumption; Operational amplifiers; Power amplifiers; Power dissipation; Power supplies; Threshold voltage; Total harmonic distortion;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7130
  • Type

    jour

  • DOI
    10.1109/82.821549
  • Filename
    821549