DocumentCode :
1298399
Title :
Correction to “a rational design process: How and why to fake it”
Author :
Parnas, David Lorge ; Clements, Paul C.
Author_Institution :
Department of Computer Science, University of Victoria, Victoria, B.C. V8W 2Y2, Canada; Computer Science and Systems Branch, Naval Research Laboratory, Washington, DC 20375
Issue :
8
fYear :
1986
Firstpage :
874
Lastpage :
874
Abstract :
A careful reader, Max Stern of Teradata Corporation, has brought to our attention two errors in the above paper.1 On page 253 in the second paragraph under point 4) the text reads, “A purely digital or purely hybrid computer is a special case of this general module.” It should read, “A purely digital or purely analog computer is a special case of this general model.”
fLanguage :
English
Journal_Title :
Software Engineering, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-5589
Type :
jour
DOI :
10.1109/TSE.1986.6312991
Filename :
6312991
Link To Document :
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