Title :
Closed-Form Expressions of 3-D Via Resistance, Inductance, and Capacitance
Author :
Savidis, Ioannis ; Friedman, Eby G.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Rochester, Rochester, NY, USA
Abstract :
Closed-form expressions of the resistance, capacitance, and inductance for interplane 3-D vias are presented in this paper. The closed-form expressions account for the 3-D via length, diameter, dielectric thickness, and spacing to ground. A 3-D numerical simulation is used to extract electromagnetic solutions of the resistance, capacitance, and inductance for comparison with the closed-form expressions, revealing good agreement between simulation and the physical models. The maximum error for the resistance, capacitance, and inductance is less than 8%.
Keywords :
capacitance measurement; equivalent circuits; inductance measurement; integrated circuit modelling; microassembling; numerical analysis; system-on-chip; 3-D numerical simulation; 3-D via resistance; capacitance; closed-form expressions; dielectric thickness; electromagnetic solutions; inductance; Capacitance; Closed-form solution; Dielectrics; Electric resistance; Electrical resistance measurement; Inductance; Integrated circuit technology; Microprocessors; Silicon; Solid modeling; 3-D; Closed-form expressions; TSV; electrical characterization;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2009.2026200
