A 5.5-GHz 1-mW Full-Modulus-Range Programmable Frequency Divider in 90-nm CMOS Process

Author

Lin, Chi-Sheng ; Chien, Ting-Hsu ; Wey, Chin-Long

Author_Institution

Nat. Chip Implementation Center, Hsinchu, Taiwan

Volume

58

Issue

9

fYear

2011

Firstpage

550

Lastpage

554

Abstract

Operating up to 5.5 GHz with 1-mW power consumption, a 90-nm CMOS programmable frequency divider with eight stages of new static D-flip-flop-based (2/1) divider cells is presented, where the supply voltage of 1.0 V is employed. The divider achieves a full modulus range from 1 to 256 and operates over a wide range maintaining up to 4 GHz with -30-dBm input power. The divider also accomplishes a power efficiency of 12.8 GHz/mW with 0.5-V supply voltage. It is favorable for advanced processes.

Keywords

CMOS integrated circuits; MMIC frequency convertors; field effect MMIC; flip-flops; frequency dividers; CMOS process; MMIC frequency convertors; frequency 5.5 GHz; full-modulus-range programmable frequency divider; power 1 mW; power efficiency; size 90 nm; static D-flip-flop-based divider cells; voltage 0.5 V; voltage 1.0 V; CMOS process; Frequency conversion; Frequency synthesizers; Logic gates; Phase locked loops; Phase noise; Power demand; Divider cell; full modulus range; phase-locked loop (PLL); power efficiency; programmable frequency divider;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2011.2161167

Filename

5985510