A pulse-width temperature-compensated megacycle core memory

A core memory designed for operation in a real-time missile-borne computer consists of a parallel 64-word by 64-bit unit. Its principal features are its high operating speed, a 0.25-μsec (microsecond) access time and 0.80-μsec cycle time, and its capability of optimum operation over the temperature range from −5 to + 125 C (degrees centigrade). This memory utilizes linear word selection, partial switching of the cores, and a special compensation feature on the sense windings to achieve the high operating speeds. Optimum operation over the temperature range is achieved by controlling the width of the memory drive pulses as a function of the ambient temperature.