DocumentCode
1300112
Title
Global optimization for digital MOS circuits performance
Author
Chen, H.M. ; Samudra, G.S. ; Chan, D.S.H. ; Ibrahim, Yaacob
Author_Institution
Dept. of Electr. Eng., Nat. Univ. of Singapore, Singapore
Volume
19
Issue
1
fYear
2000
fDate
1/1/2000 12:00:00 AM
Firstpage
161
Lastpage
164
Abstract
Apart from maximization of parametric yield, minimization of the spread in performance functions due to process variation is of extreme importance in very large scale integrated circuit design. To achieve efficient minimization of the spread, a novel algorithm based on the genetic algorithm and global approximation methods is proposed. The algorithm operates in two stages designated as coarse and fine optimization stages and adjusts design parameter set to simultaneously achieve the target performance and reduction in performance spread. The algorithm has distinctive features, such as global optimum design, subexponential complexity algorithm for N-P complete problem of global optimization, and simultaneous optimization of many functions. The algorithm is demonstrated using four design examples
Keywords
MOS digital integrated circuits; VLSI; circuit optimisation; genetic algorithms; integrated circuit design; NP complete problem; VLSI design; digital MOS circuit; genetic algorithm; global optimization; parametric yield; performance spread; Algorithm design and analysis; Approximation algorithms; Approximation methods; Circuit optimization; Design optimization; Genetic algorithms; Integrated circuit synthesis; Integrated circuit yield; Minimization methods; Very large scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.822628
Filename
822628
Link To Document