DocumentCode :
1300803
Title :
Cryogenic Operation of Junctionless Nanowire Transistors
Author :
de Souza, M. ; Pavanello, Marcelo Antonio ; Trevisoli, R.D. ; Doria, R.T. ; Colinge, J.
Author_Institution :
Centro Univ. da FEI, São Bernardo do Campo, Brazil
Volume :
32
Issue :
10
fYear :
2011
Firstpage :
1322
Lastpage :
1324
Abstract :
This letter presents the properties of nMOS junctionless nanowire transistors (JNTs) under cryogenic operation. Experimental results of drain current, subthreshold slope, maximum transconductance at low electric field, and threshold voltage, as well as its variation with temperature, are presented. Unlike in classical devices, the drain current of JNTs decreases when temperature is lowered, although the maximum transconductance increases when the temperature is lowered down to 125 K. An analytical model for the threshold voltage is proposed to explain the influence of nanowire width and doping concentration on its variation with temperature. It is shown that the wider the nanowire or the lower the doping concentration, the higher the threshold voltage variation with temperature.
Keywords :
MOSFET; cryogenic electronics; nanowires; semiconductor doping; cryogenic operation; doping concentration; drain current; maximum transconductance; nMOS junctionless nanowire transistors; subthreshold slope; temperature variation; threshold voltage; Doping; Logic gates; Neodymium; Silicon; Temperature measurement; Threshold voltage; Transistors; Junctionless transistor; low temperature; nanowire transistor; silicon-on-insulator (SOI); threshold voltage model;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2011.2161748
Filename :
5989840
Link To Document :
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