Title :
An alternative approach to the ROM-less direct digital synthesis
Author :
Nieznanski, Janusz
Author_Institution :
Dept. of Electr. Eng., Tech. Univ. Gdansk, Poland
fDate :
1/1/1998 12:00:00 AM
Abstract :
The author demonstrates how the idea of a ROM-less direct digital synthesizer, presented in a recent paper by Nakagawa and Nosaka (see ibid., vol. 32, no. 5, p. 766-70, 1997) can be derived based on different premises, leading to a different architecture. The approach presented here may enhance the understanding of what can be done to eliminate the pulse-position jitter inherent in the accumulator, and thus provide the designer with additional degree of freedom in choosing the ultimate structure of the synthesizer
Keywords :
direct digital synthesis; jitter; DDS; ROM-less direct digital synthesis; accumulator; architecture; pulse-position jitter elimination; Adders; Circuit synthesis; Clocks; Equations; Frequency synthesizers; Interpolation; Jitter; Pulse circuits; Pulse measurements; Read only memory;
Journal_Title :
Solid-State Circuits, IEEE Journal of