DocumentCode :
1301164
Title :
Transimpedance receiver design optimization for smart pixel arrays
Author :
Van Blerkom, Daniel A. ; Fan, Chi ; Blume, Matthias ; Esener, Sadik C.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
Volume :
16
Issue :
1
fYear :
1998
fDate :
1/1/1998 12:00:00 AM
Firstpage :
119
Lastpage :
126
Abstract :
Optical transimpedance receivers implemented in CMOS VLSI technologies are modeled and optimized for freespace optoelectronic interconnections. Sensitivity, bandwidth, power dissipation, and circuit area are analyzed for receivers using three different submicron CMOS processes. A comparison with the circuit noise limited optical power indicates that, for digital computing applications, the receiver sensitivity is limited by the gain-bandwidth product of the receiver amplifiers and the necessary noise margin of logic circuits
Keywords :
CMOS integrated circuits; VLSI; integrated circuit modelling; integrated circuit noise; integrated optoelectronics; logic circuits; optical computing; optical interconnections; optical receivers; optimisation; sensitivity; smart pixels; CMOS VLSI technologies; bandwidth; circuit area; circuit noise limited optical power; digital computing applications; freespace optoelectronic interconnections; gain-bandwidth product; logic circuits; noise margin; optical receivers; optical transimpedance receivers; power dissipation; receiver amplifiers; receiver sensitivity; sensitivity; smart pixel arrays; submicron CMOS processes; transimpedance receiver design optimization; CMOS technology; Circuit noise; Design optimization; Optical interconnections; Optical noise; Optical receivers; Optical sensors; Semiconductor device modeling; Smart pixels; Very large scale integration;
fLanguage :
English
Journal_Title :
Lightwave Technology, Journal of
Publisher :
ieee
ISSN :
0733-8724
Type :
jour
DOI :
10.1109/50.654993
Filename :
654993
Link To Document :
بازگشت