DocumentCode :
1301531
Title :
Efficient Data Structures and Methodologies for SAT-Based ATPG Providing High Fault Coverage in Industrial Application
Author :
Eggersglüss, Stephan ; Drechsler, Rolf
Author_Institution :
Group of Comput. Archit., Univ. of Bremen, Bremen, Germany
Volume :
30
Issue :
9
fYear :
2011
Firstpage :
1411
Lastpage :
1415
Abstract :
ATPG based on Boolean satisfiability (SAT) turned out to be a robust alternative to classical structural automatic test pattern generation (ATPG) algorithms performing very well especially for hard-to-detect faults but suffer from the overhead for easy-to-detect faults. In this letter, we propose new efficient data structures and methodologies for SAT-based ATPG. The novel incremental SAT solving technique dynamic clause activation which makes use of structural information using dedicated data structures forms the core of a new flexible SAT-based ATPG approach. Experimental results on large industrial circuits show a significant performance gain and a removal of the limitations. At the same time, the robustness of SAT-based ATPG can even be strengthened resulting in very high fault efficiency and increased fault coverage for transition faults.
Keywords :
Boolean algebra; automatic test pattern generation; computability; data structures; flexible electronics; Boolean satisfiability; SAT-based ATPG; automatic test pattern generation algorithm; data structures; easy-to-detect faults; hard-to-detect faults; high fault coverage; industrial circuits; structural information; transition faults; Algorithm design and analysis; Automatic test pattern generation; Circuit faults; Data structures; Heuristic algorithms; Logic gates; Robustness; ATPG; SAT; formal methods; testing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2011.2152450
Filename :
5989985
Link To Document :
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