Title :
Cross-Coupling Low-Triggering Dual-Polarity CLTdSCR ESD Protection in CMOS
Author :
Wang, X. ; Liu, J. ; Fan, S. ; Lin, L. ; Tang, H. ; Wang, A. ; Chen, H. ; Yang, L. ; Zhao, B.
Author_Institution :
Dept. of Electr. Eng., Univ. of California Riverside, Riverside, CA, USA
Abstract :
This letter reports a novel ultrafast cross-coupling low-triggering dual-polarity SCR (CLTdSCR) ESD protection network in a CMOS. The measurement shows ultralow and tunable triggering voltage Vt1 ~ 3.83 V, low discharging resistance Rοn 0.26 Ω, low leakage Ileak ~ 0.36 nA, low noise figure NF ~ 0.2 dB, low parasitic capacitance CESD ~ 150 fF, and fast effective response t1 ~ 100 ps. It achieves a very high ~7 V/μm2 ESD protection level.
Keywords :
CMOS integrated circuits; electrostatic discharge; thyristors; CMOS; cross-coupling low-triggering dual-polarity silicon-controlled rectifier ESD protection network; CMOS integrated circuits; Electrostatic discharge; Integrated circuit modeling; Logic gates; Radio frequency; Testing; Thyristors; Electrostatic discharge (ESD) protection; RF; low triggering; silicon-controlled rectifier (SCR);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2010.2058842
