Title :
A 25-mV-Sensitivity 2-Gb/s Optimum-Logic-Threshold Capacitive-Coupling Receiver for Wireless Wafer Probing Systems
Author :
Kim, Gil-Su ; Takamiya, Makoto ; Sakurai, Takayasu
Author_Institution :
Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan
Abstract :
A high-sensitivity capacitive-coupling receiver is presented for wireless wafer probing systems. The receiver with the optimum logic threshold (OLT) achieves the highest sensitivity of 25 mV at the data rate of 2 Gb/s in 0.18-mum CMOS. The OLT receiver increases the communication distance by more than four times while providing tolerance against distance-voltage-area variations.
Keywords :
CMOS logic circuits; integrated circuit testing; logic circuits; radio receivers; CMOS; bit rate 2 Gbit/s; distance-voltage-area variations; optimum logic threshold capacitive coupling receiver; size 0.18 mum; wireless wafer probing systems; Capacitive coupling; high speed; inductive coupling; optimum logic threshold (OLT); sensitivity; tolerance; wireless wafer probing system;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2009.2027966
