An Integrated ISFETs Instrumentation System in Standard CMOS Technology

This paper describes an integrated ISFETs instrumentation system in a 0.18 μm 1-poly-6-metal CMOS process. The chip is able to compute the average of CMOS ISFETs´ threshold voltages by using an averaging array employing global negative current feedback. In addition, neither reference voltage nor current is required to set up the sigma-delta modulator because the internal signal is converted and processed in the frequency domain. The chip operates at 3.3 V for the analog blocks and the digital input/output blocks, and at 1.8 V for the core digital logic. It achieves 8 bits accuracy under 80 μW static power consumption. The die area is 2.6 mm².